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19-2805; Rev 0; 4/03
Multichemistry Battery Charger with Automatic System Power Selector
General Description
The MAX1909 highly integrated control IC simplifies construction of accurate and efficient multichemistry battery chargers. The MAX1909 uses analog inputs to control charge current and voltage, and can be programmed by a host microcontroller (C) or hardwired. High efficiency is achieved through use of buck topology with synchronous rectification. The maximum current drawn from the AC adapter is programmable to avoid overloading the AC adapter when supplying the load and the battery charger simultaneously. The MAX1909 provides a digital output that indicates the presence of an AC adapter, and an analog output that monitors the current drawn from the AC adapter. Based on the presence or absence of the AC adapter, the MAX1909 automatically selects the appropriate source for supplying power to the system by controlling two external P-channel MOSFETs. Under system control, the MAX1909 allows the battery to undergo a relearning or conditioning cycle in which the battery is completely discharged through the system load and then recharged. The MAX1909 is available in a space-saving 28-pin, 5mm 5mm thin QFN package and operates over the extended -40C to +85C temperature range. o o o o o o o o o o o o
Features
0.5% Accurate Charge Voltage (0C to +85C) 3% Accurate Input Current Limiting 5% Accurate Charge Current Programmable Charge Current >4A Automatic System Power-Source Selection Analog Inputs Control Charge Current and Charge Voltage Monitor Outputs for Current Drawn from AC Input Source AC Adapter Present Up to 17.65V (max) Battery Voltage Maximum 28V Input Voltage Greater than 95% Efficiency Conditioning Charge Safely Charges Overdischarged Li+ Packs Charges Any Battery Chemistry: Li+, NiCd, NiMH, Lead Acid, etc.
MAX1909
Ordering Information
PART MAX1909ETI TEMP RANGE -40C to +85C PIN-PACKAGE 28 Thin QFN
Applications
Notebook and Subnotebook Computers Hand-Held Data Terminals
AC ADAPTER: INPUT
Minimum Operating Circuit
P3 0.01 SRC CSSP CSSN DHIV PDL P2 TO EXTERNAL LOAD
Pin Configuration
CSSN CSSP DHIV PDS SRC PDL
PDS SRC
TOP VIEW
DCIN
DHI
VCTL LDO ICTL MODE
MAX1909 LDO
28
DCIN LDO ACIN REF PKPRES ACOK MODE
27
26
25
24
23
22 21 20 19
DLOV DLO PGND
VCC
1 2 3 4 5 6 7 8
IINP
ACIN IINP REF IINP CLS ACOK
DLOV P1 DHI
MAX1909
18 17 16 15
CSIP CSIN BATT GND
TO HOST SYSTEM
LDO DLO PGND PKPRES CSIP 0.015 N1 10H
9
CLS
10
ICTL
11
VCTL
12
CCI
13
CCV
14
CCS
CCV CCI CCS REF
CSIN BATT GND
THIN QFN
Functional Diagrams appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Multichemistry Battery Charger with Automatic System Power Selector MAX1909
ABSOLUTE MAXIMUM RATINGS
DCIN, CSSP, CSSN, SRC, ACOK to GND..............-0.3V to +30V DHIV ...........................................................SRC + 0.3, SRC - 6V DHI, PDL, PDS to GND ...............................-0.3V to (VSRC + 0.3) BATT, CSIP, CSIN to GND .....................................-0.3V to +20V CSIP to CSIN or CSSP to CSSN or PGND to GND ...-0.3V to +0.3V CCI, CCS, CCV, DLO, IINP, REF, ACIN to GND ........................................-0.3V to (VLDO + 0.3V) DLOV, VCTL, ICTL, MODE, CLS, LDO, PKPRES to GND ...................................................-0.3V to +6V DLOV to LDO.........................................................-0.3V to +0.3V DLO to PGND ..........................................-0.3V to (DLOV + 0.3V) LDO Short-Circuit Current...................................................50mA Continuous Power Dissipation (TA = +70C) 28-Pin QFN (derate 20.8mW/C above +70C) .........1666mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER CHARGE VOLTAGE REGULATION VCTL Range VVCTL = 3.6V (3 or 4 cells); not including VCTL resistor tolerances VVCTL = 3.6V/20 (3 or 4 cells); not including VCTL resistor tolerances VVCTL = 3.6V (3 or 4 cells); including VCTL resistor tolerances of 1% VVCTL = VLDO (3 or 4 cells, default threshold of 4.2V/cell) VVCTL Default Threshold VCTL Input Bias Current CHARGE-CURRENT REGULATION ICTL Range CSIP-to-CSIN Full-Scale CurrentSense Voltage VICTL = 3.6V (not including ICTL resistor tolerances) VICTL = 3.6V x 0.5 (not including ICTL resistor tolerances) Charge-Current Accuracy VICTL = 0.9V (not including ICTL resistor tolerances) VICTL = 3.6V x 0.5 (including ICTL resistor tolerances of 1%) VICTL = VLDO (default threshold of 45mV) VICTL Default Threshold VICTL rising 0 69.37 -7.5 -5 -7.5 -7.0 -5 4.1 4.2 75.00 3.6 80.63 +7.5 +5 +7.5 +7.0 +5 4.3 V % V mV VVCTL rising VVCTL = 3V VDCIN = 0, VVCTL = 5V 0 -0.8 -0.8 -1.0 -0.5 4.1 0 0 3.6 +0.8 +0.8 % +1.0 +0.5 4.3 2.5 12 V A V SYMBOL CONDITIONS MIN TYP MAX UNITS
Battery Regulation Voltage Accuracy
2
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Multichemistry Battery Charger with Automatic System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER BATT/CSIP/CSIN Input Voltage Range CSIP/CSIN Input Current ICTL Power-Down Mode Threshold Voltage ICTL Power-Up Mode Threshold Voltage ICTL Input Bias Current INPUT CURRENT REGULATION CSSP-to-CSSN Full-Scale Current-Sense Voltage Input Current-Limit Accuracy CSSP/CSSN Input Voltage Range CSSP/CSSN Input Current CLS Input Range CLS Input Bias Current IINP Transconductance VCLS = 2.0V VCSSP - VCSSN = 56mV VCSSP - VCSSN = 75mV, terminated with 10k IINP Accuracy VCSSP - VCSSN = 56mV, terminated with 10k VCSSP - VCSSN = 20mV, terminated with 10k IINP Output Current IINP Output Voltage SUPPLY AND LINEAR REGULATOR DCIN Input Voltage Range DCIN Undervoltage Lockout Trip Point DCIN Quiescent Current IDCIN VDCIN DCIN falling DCIN rising 8.0V < VDCIN < 28V 8.0 7 7.4 7.5 2.7 7.85 6 28 V V mA VCSSP - VCSSN = 150mV, VIINP = 0V VCSSP - VCSSN = 150mV, VIINP = float VCSSP = VCSSN = VDCIN > 8.0V VDCIN = 0 1.6 -1 2.7 -7.5 -5 -10 350 3.5 3.0 VCLS = REF VCLS = REF x 0.75 VCLS = REF x 0.5 72.75 -3 -3 -4 8.0 450 0.1 75.00 77.25 +3 +3 +4 28 730 1 REF +1 3.3 +7.5 +5 +10 A V % V A V A mA/V % mV VICTL = 3V VDCIN = 0V, VICTL = 5V 0.85 -1 -1 +1 +1 Charging enabled Charging disabled; VDCIN = 0 or VICTL = 0 SYMBOL CONDITIONS MIN 0 350 0.1 TYP MAX 19 650 1 0.75 UNITS V A V V A
MAX1909
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3
Multichemistry Battery Charger with Automatic System Power Selector MAX1909
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER SYMBOL CONDITIONS VBATT = 19V, VDCIN = 0V, or ICTL = 0V VBATT = 16.8V, VDCIN = 19V, ICTL = 0V VBATT = 2V to 19V, VDCIN > VBATT + 0.3V 8.0V < VDCIN < 28V, no load 0 < ILDO < 10mA VDCIN = 8.0V 3.20 5.25 MIN TYP 0.1 0.1 200 5.4 80 4 MAX 1 1 500 5.55 115 5.15 V mV V A UNITS
BATT Input Current
IBATT
LDO Output Voltage LDO Load Regulation LDO Undervoltage Lockout Trip Point REFERENCE REF Output Voltage REF Undervoltage Lockout Trip Point TRIP POINTS BATT POWER_FAIL Threshold BATT POWER_FAIL Threshold Hysteresis ACIN Threshold ACIN Threshold Hysteresis ACIN Input Bias Current SWITCHING REGULATOR DHI Off-Time DHI Minimum Off-Time DLOV Supply Current Sense Voltage for Minimum Discontinuous Mode Ripple Current Cycle-by-Cycle Current-Limit Sense Voltage Sense Voltage for Battery Undervoltage Charge Current Battery Undervoltage Threshold DHIV Output Voltage DHIV Sink Current DHI On-Resistance Low DHI On-Resistance High DLO On-Resistance High DLO On-Resistance Low IDLOV Ref
0 < IREF < 500A REF falling
4.2023
4.2235 3.1
4.2447 3.9
V V
VDCIN - VBATT, VDCIN falling
50 100
100 200 2.048 20
150 300 2.089 30 +1
mV mV V mV A ns ns A mV
ACIN rising VACIN = 2.048V VBATT = 16.0V, VDCIN = 19V, VMODE = 3.6V VBATT = 16.0V, VDCIN = 17V, VMODE = 3.6V DLO low
2.007 10 -1 360 260
400 300 5 7.5
440 350 10
97
mV
BATT = 3.0V per cell MODE = float (3 cell), VATT rising B MODE = DLOV (4 cell), BATT rising V With respect to SRC DHI = V DHIV, IDHI = -10mA DHI = V CSSN, IDHI = 10mA VDLOV = 4.5V, IDLO = +100mA VDLOV = 4.5V, IDLO = -100mA
3 9.18 12.235 -4.5 10
4.5
6 9.42 12.565
mV
V V mA
-5.0 2 2 3 1
-5.5 5 4 7 3
4
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Multichemistry Battery Charger with Automatic System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER ERROR AMPLIFIERS GMV Loop Transconductance GMI Loop Transconductance GMS Loop Transconductance CCI/CCS/CCV Clamp Voltage LOGIC LEVELS MODE Input Low Voltage MODE Input Middle Voltage MODE Input High Voltage MODE Input Bias Current ACOK AND PKPRES ACOK Input Voltage Range ACOK Sink Current ACOK Leakage Current PKPRES Input Voltage Range PKPRES Input Bias Current PKPRES Battery Removal Detect Threshold PKPRES Hysteresis PDS, PDL SWITCH CONTROL PDS Switch Turn-Off Threshold PDS Switch Threshold Hysteresis PDS Output Low Voltage, PDS Below SRC PDS Turn-On Current PDS Turn-Off Current PDL Switch Turn-On Threshold PDL Switch Threshold Hysteresis PDL Turn-On Resistance PDL Turn-Off Current SRC Input Bias Current Delay Time Between PDL and PDS Transitions VDCIN - VBATT, VDCIN falling VDCIN - VBATT IPDS = 0V PDS = SRC VPDS = VSRC - 2V, VDCIN = 16V VDCIN - VBATT, VDCIN falling VDCIN - VBATT PDL = GND VSRC - VPDL = 1.5V SRC = 19V, DCIN = 0V SRC = 19, VBATT = 16V 2.5 450 5 50 100 8 6 10 50 100 50 6 100 200 10 12 50 100 200 100 12 1 1000 7.5 150 300 150 150 300 12 mV mV V mA mA mV mV k mA A s PKPRES rising VACOK = 0.4V, ACIN = 1.5V VACOK = 28V, ACIN = 2.5V 0 -1 90 1 0 1 1 LDO +1 28 V mA A V A % of LDO % MODE = 0V or 3.6V 1.6 2.8 -2 +2 1.8 0.8 2.0 V V V A VCTL = 3.6, VBATT = 16.8V, MODE = LDO VCTL = 3.6, VBATT = 12.6V, MODE = FLOAT ICTL = 3.6V, VCSSP - VCSIN = 75mV VCLS = 2.048V, VCSSP - VCSSN = 75mV 0.25V < VCCV < 2.0V, 0.25V < VCCI < 2.0V, 0.25V < VCCS < 2.0V 0.0625 0.0833 0.5 0.5 150 0.125 0.167 1 1 300 0.2500 0.3330 2 2 600 mA/V mA/V mA/V mV SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1909
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5
Multichemistry Battery Charger with Automatic System Power Selector MAX1909
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER CHARGE VOLTAGE REGULATION VCTL Range VVCTL = 3.6V (3 or 4 cells); not including VCTL resistor tolerances VVCTL = 3.6V/20 (3 or 4 cells); not including VCTL resistor tolerances VVCTL = 3.6V (3 or 4 cells); including VCTL resistor tolerances of 1% VVCTL = VLDO (3 or 4 cells, default threshold of 4.2V/cell) VVCTL Default Threshold VCTL Input Bias Current CHARGE-CURRENT REGULATION ICTL Range CSIP-to-CSIN Full-Scale CurrentSense Voltage VICTL = 3.6V (not including ICTL resistor tolerances) VICTL = 3.6V x 0.5 (not including ICTL resistor tolerances) Charge-Current Accuracy VICTL = 0.9V (not including ICTL resistor tolerances) VICTL = 3.6V x 0.5 (including ICTL resistor tolerances of 1%) VICTL = VLDO (default threshold of 45mV) VICTL Default Threshold BATT/CSIP/CSIN Input Voltage Range CSIP/CSIN Input Current ICTL Power-Down Mode Threshold Voltage ICTL Power-Up Mode Threshold Voltage INPUT CURRENT REGULATION CSSP-to-CSSN Full-Scale Current-Sense Voltage 72.75 77.25 mV 0.85 Charging enabled VICTL rising 0 69.37 -7.5 -5 -7.5 -7.0 -5 4.3 0 19 650 0.75 3.6 80.63 +7.5 +5 +7.5 +7.0 +5 V V A V V % V mV VVCTL rising VVCTL = 3V VDCIN = 0V, VVCTL = 5V 0 -0.8 -0.8 -1.0 -0.8 4.1 0 0 3.6 +0.8 +0.8 % +1.0 +0.8 4.3 2.5 12 V A V SYMBOL CONDITIONS MIN TYP MAX UNITS
Battery Regulation Voltage Accuracy
6
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Multichemistry Battery Charger with Automatic System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Input Current-Limit Accuracy CSSP/CSSN Input Voltage Range CSSP/CSSN Input Current CLS Input Range IINP Transconductance VCSSP - VCSSN = 56mV VCSSP - VCSSN = 75mV, terminated with 10k IINP Accuracy VCSSP - VCSSN = 56mV, terminated with 10k VCSSP - VCSSN = 20mV, terminated with 10k IINP Output Current IINP Output Voltage SUPPLY AND LINEAR REGULATOR DCIN Input Voltage Range DCIN Undervoltage Lockout Trip Point DCIN Quiescent Current BATT Input Current LDO Output Voltage LDO Load Regulation LDO Undervoltage Lockout Trip Point REFERENCE REF Output Voltage REF Undervoltage Lockout Trip Point TRIP POINTS BATT POWER_FAIL Threshold BATT POWER_FAIL Threshold Hysteresis ACIN Threshold ACIN Threshold Hysteresis ACIN rising VDCIN - VBATT, VDCIN falling 50 100 2.007 10 150 300 2.089 30 mV mV V mV Ref 0 < IREF < 500A REF falling 4.1960 4.2520 3.9 V V IDCIN IBATT VDCIN DCIN falling DCIN rising 8.0V < VDCIN < 28V VBATT = 2V to 19V, VDCIN > VBATT + 0.3V 8.0V < VDCIN < 28V, no load 0 < ILDO < 10mA VDCIN = 8.0V 3.2 5.25 8.0 7 7.85 6 500 5.55 115 5.15 28 V V mA A V mV V VCSSP - VCSSN = 150mV, VIINP = 0V VCSSP - VCSSN = 150mV, VIINP = float VCSSP = VCSSN = VDCIN > 8.0V 1.6 2.7 -7.5 -5 -10 350 3.5 SYMBOL VCLS = REF VCLS = REF x 0.75 VCLS = REF x 0.5 CONDITIONS MIN -3 -3 -4 8.0 TYP MAX +3 +3 +4 28 730 REF 3.3 +7.5 +5 +10 A V % V A V mA/V % UNITS
MAX1909
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Multichemistry Battery Charger with Automatic System Power Selector MAX1909
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER SWITCHING REGULATOR DHI Off-Time DHI Minimum Off-Time DLOV Supply Current Sense Voltage for Battery Undervoltage Charge Current Battery Undervoltage Threshold DHIV Output Voltage DHIV Sink Current DHI On-Resistance Low DHI On-Resistance High DLO On-Resistance High DLO On-Resistance Low ERROR AMPLIFIERS VCTL = 3.6, VBATT = 16.8V, MODE = LDO GMV Loop Transconductance GMI Loop Transconductance GMS Loop Transconductance CCI/CCS/CCV Clamp Voltage LOGIC LEVELS MODE Input Low Voltage MODE Input Middle Voltage MODE Input High Voltage ACOK AND PKPRES ACOK Input Voltage Range ACOK Sink Current PKPRES Input Voltage Range PKPRES Battery Removal Detect Threshold PDS, PDL SWITCH CONTROL PDS Switch Turn-Off Threshold VDCIN - VBATT, VDCIN falling 50 150 mV PKPRES rising VACOK = 0.4V, ACIN = 1.5V 0 1 0 90 LDO 28 V mA V % of LDO 1.6 2.8 0.8 2.0 V V V VCTL = 3.6, VBATT = 12.6V, MODE = FLOAT ICTL = 3.6V, VCSSP - VCSIN = 75mV VCLS = 2.048V, VCSSP - VCSSN = 75mV 0.25V < VCCV < 2.0V, 0.25V < VCCI < 2.0V, 0.25V < VCCS < 2.0V 0.0625 0.0833 0.5 0.5 150 0.2500 0.3330 2 2 600 mA/V mA/V mA/V mV DHI = VDHIV, IDHI = -10mA DHI = VCSSN, IDHI = 10mA VDLOV = 4.5V, IDLO = +100mA VDLOV = 4.5V, IDLO = -100mA IDLOV VBATT = 16.0V, VDCIN = 19V, VMODE = 3.6V VBATT = 16.0V, VDCIN = 17V, VMODE = 3.6V DLO low BATT = 3.0V per cell MODE = float (3 cell), VBATT rising MODE = DLOV (4 cell), VBATT rising With respect to SRC 3 9.18 12.235 -4.5 10 5 4 7 3 360 260 440 350 10 6 9.42 12.565 -5.5 ns ns A mV SYMBOL CONDITIONS MIN TYP MAX UNITS
V V mA
8
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Multichemistry Battery Charger with Automatic System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS = REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER PDS Switch Threshold Hysteresis PDS Output Low Voltage, PDS Below SRC PDS Turn-On Current PDS Turn-Off Current PDL Switch Turn-On Threshold PDL Switch Threshold Hysteresis PDL Turn-On Resistance PDL Turn-Off Current SRC Input Bias Current Delay Time Between PDL and PDS Transitions SYMBOL VDCIN - VBATT IPDS = 0V PDS = SRC VPDS = VSRC - 2V, VDCIN = 16V VDCIN - VBATT, VDCIN falling VDCIN - VBATT PDL = GND VSRC - VPDL = 1.5V SRC = 19, VBATT = 16V 2.5 CONDITIONS MIN 100 8 6 10 50 100 50 6 1000 7.5 150 300 150 TYP MAX 300 12 UNITS mV V mA mA mV mV k mA A s
MAX1909
Note 1: Guaranteed by design. Not production tested.
Typical Operating Characteristics
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25C, unless otherwise noted.)
BATTERY INSERTION AND REMOVAL RESPONSE
MAX1909 toc01
SYSTEM LOAD TRANSIENT RESPONSE
MAX1909 toc02
17V VBATT 16V VCCV 0A 5A/div IBATT
5A ISYSTEMLOAD 0A 5A IIN 0A 5A IBATT 0A
IIN 0A 5A/div VCCV VCCI VCCV VCCI 0V 500s/div 100s/div VCCI 3V 2V VCCI, VCCV 1V CCI CCS
3V 2V VCCI 1V VCCS 0V
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9
Multichemistry Battery Charger with Automatic System Power Selector MAX1909
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25C, unless otherwise noted.)
LINE TRANSIENT RESPONSE
MAX1909 toc03
LDO LOAD REGULATION
MAX1909 toc04
30V VDCIN 20V LDO OUTPUT ERROR (%) INDUCTOR CURRENT 200mA/div 3A
0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 0 1 2 3 4 5 6 7 8 9
VBATT AC-COUPLED 200mV/div
1.8V VCCV 1.6V 500s/div
10
LDO CURRENT (mA)
LDO LINE REGULATION
MAX1909 toc05
REF LOAD REGULATION
MAX1909 toc06
REF vs. TEMPERATURE
MAX1909 toc07
0.10
0 -0.02 REF OUTPUT ERROR (%) -0.04 -0.06 -0.08 -0.10 -0.12
0.10 0.05 REF OUTPUT ERROR (%) 0 -0.05 -0.10 -0.15 -0.20
LDO OUTPUT ERROR (%)
0.05
0
-0.05
-0.10 0 10 20 30 INPUT VOLTAGE (V)
-0.14 0 200 400 600 800 1000 REF CURRENT (A)
-40
-15
10
35
60
85
TEMPERATURE (C)
EFFICIENCY vs. CHARGE CURRENT
MAX1909 toc08
SWITCHING FREQUENCY vs. VIN - VBATT
450 SWITCHING FREQUENCY (kHz) 400 350 IINP (%) 300 250 200 150 100 50 0 0.5 0 0 2 4 6 8 10 0 2.5 2.0 1.5 1.0
MAX1909 toc09
IINP ERROR vs. INPUT CURRENT
3.5 3.0 CHARGER DISABLED
MAX1909 toc10
100 98 96 EFFICIENCY (%) 94 92 90 88 86 84 82 80 0 0.5 1.0 1.5 2.0 2.5 3 CELLS 4 CELLS
500
4.0
3.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
CHARGE CURRENT (A)
VIN - VBATT (V)
INPUT CURRENT (A)
10
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Multichemistry Battery Charger with Automatic System Power Selector
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25C, unless otherwise noted.)
INPUT CURRENT-LIMIT ACCURACY vs. SYSTEM LOAD
MAX1909 toc11
MAX1909
IINP ACCURACY vs. INPUT CURRENT
8 6 IINP ACCURACY (%) 4 2 0 -2 -4 -6 -8 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 INPUT CURRENT (A) 4 INPUT CURRENT-LIMIT ACCURACY (%) 3 2 1 0 -1 -2 0.5
INPUT CURRENT-LIMIT ACCURACY vs. VCLS
MAX1909 toc12
INPUT CURRENT-LIMIT ACCURACY (%)
VBATT = 13V VBATT = 10V
2 1 0 -1 -2 -3
VBATT = 16V VBATT = 12V ICHARGE = 3A
1.0
1.5
2.0
2.5
3.0
1.5
2.0
2.5 VCLS (V)
3.0
3.5
SYSTEM LOAD (A)
PDL-PDS SWITCHING, AC ADAPTER INSERTION
MAX1909 toc14
PDS-PDL SWITCHOVER, WALL ADAPTER REMOVAL
MAX1909 toc15
20V VPDS VWALLADAPTER 10V 20V VSYSTEMLOAD, VPDS 10V SYSTEM LOAD VPDL 20V VPDL, VBATT 10V 0V VPDL 100s/div 500s/div VPDS VPDL
20V VSYSTEMLOAD 10V VPDS 20V VWALLADAPTER 10V 0V 20V VBATT 10V VPDL 0V VSYSTEMLOAD
PDS-PDL SWITCHOVER, BATTERY INSERTION
20V VPDS 15V VSYSTEM CONDITIONING MODE 10V WALL ADAPTER = 18V 5V VPKDET 0V VPKPRES 15V VBATT 10V 5V V PDL 0V 50s/div
MAX1909 toc16
PDL-PDS SWITCHING, BATTERY REMOVAL
20V VSYSTEM CONDITIONING MODE 15V WALL ADAPTER = 18V 10V VPDS 5V VPKPRES 0V VPDL 15V VBATT 10V 5V 0V 10s/div
MAX1909 toc17
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11
MAX1909 toc13
3
Multichemistry Battery Charger with Automatic System Power Selector MAX1909
Pin Description
PIN 1 2 3 4 5 6 NAME DCIN LDO ACIN REF PKPRES ACOK FUNCTION DC Supply Voltage Input. Bypass DCIN with a 1F capacitor to power ground. Device Power Supply. Output of the 5.4V linear regulator supplied from DCIN. Bypass with a 1F capacitor. AC Detect Input. This uncommitted comparator input can be used to detect the presence of the charger's power source. The comparator's open-drain output is the ACOK signal. 4.2235V Voltage Reference. Bypass with a 1F capacitor to GND. Pull PKPRES high to disable charging. Used for detecting presence of battery pack. This input can also be used as a simple shutdown control. AC Detect Output. High-voltage open-drain output is high impedance when ACIN is greater than 2.048V. The ACOK output remains a high impedance when the MAX1909 is powered down. Trilevel Input for Setting Number of Cells and Asserting the Conditioning Mode: MODE = GND; asserts conditioning mode. MODE = float; charge with 3 times the cell voltage programmed at VCTL. MODE = LDO; charge with 4 times the cell voltage programmed at VCTL. Input Current Monitor Output. The current delivered at the IINP output is a scaled-down replica of the system load current plus the input-referred charge current sensed across CSSP and CSSN inputs. The transconductance of (CSSP - CSSN) to IINP is 3mA/V. Source Current-Limit Input. Voltage input for setting the current limit of the input source. Input for Setting Maximum Output Current Input for Setting Maximum Output Voltage Output Current Regulation Loop Compensation Point. Connect 0.01F to GND. Voltage Regulation Loop Compensation Point. Connect 20k in series with 0.01F to GND. Input Current Regulation Loop Compensation Point. Use 470pF to GND. Analog Ground Battery Voltage Feedback Input Output Current-Sense Negative Input Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN. Power Ground Low-Side Power MOSFET Driver Output. Connect to low-side NMOS gate. When the MAX1909 is shut down, the DLO output is LOW. Low-Side Driver Supply. Bypass with a 0.1F capacitor to ground. High-Side Driver Supply. Bypass with a 0.1F capacitor to SRC. High-Side Power MOSFET Driver Output. Connect to high-side PMOS gate. When the MAX1909 is shut down, the DHI output is HIGH. Source Connection for Driver for PDS/PDL Switches. Bypass SRC to power ground with a 1F capacitor. Input Current Sense for Charger (Negative Input). Input Current Sense for Charger (Positive Input). Connect a current-sense resistor from CSSP to CSSN. Power Source PMOS Switch Driver Output. When the MAX1909 is powered down, the PDS output is pulled to SRC through an internal 1M resistor. System Load PMOS Switch Driver Output. When the MAX1909 is powered down, the PDL output is pulled to ground through an internal 100k resistor.
7
MODE
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
IINP CLS ICTL VCTL CCI CCV CCS GND BATT CSIN CSIP PGND DLO DLOV DHIV DHI SRC CSSN CSSP PDS PDL
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Multichemistry Battery Charger with Automatic System Power Selector MAX1909
P3 AC ADAPTER RS1 0.01 TO SYSTEM LOAD C1 22F OUTPUT VOLTAGE: 12.6V CHARGE I LIMIT: 3.0A R6 590k 1% D4 R7 196k 1% C22 1F PDS SRC C5 1F DCIN DHIV CSSP CSSN C17 0.1F SRC
MAX1909
R4 100k VCTL ICTL
PDL LDO C13 1F
P2
LDO
R13 33 C16 1F P1
OUTPUT ACIN VCC (INPUT I LIMIT: 7.5A) R8 1M REF CLS ACOK TO HOST SYSTEM MODE
DLOV
DHI
DLO LDO R9 10k PKPRES CCV CCI CCS C9 0.01F C10 0.01F REF C12 1F CSIN BATT GND PGND CSIP
N1 L1 10H
RS2 0.015 BATT + C4 22F BATTERY
R5 10k C11 0.1F
TEMP GND PGND GND BATT -
Figure 1. Typical Operating Circuit Demonstrating Hardwired Control
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Multichemistry Battery Charger with Automatic System Power Selector MAX1909
P3 AC ADAPTER P4 RS1 0.01 TO SYSTEM LOAD C1 22F OUTPUT VOLTAGE: 16.8V SRC D5 C15 1F R6 590k 1% D4 R7 196k 1% CSSP PDS SRC C5 1F LDO D/A OUTPUT OPEN-DRAIN OUTPUTS VCC R8 1M INPUT OUTPUT A/D INPUT C14 0.1F R9 10k (INPUT I LIMIT: 7.5A) REF ACOK PKPRES IINP CLS CCV R5 10k HOST LDO R19, R20 10k R21 10k C9 0.01F C11 0.1F CCI CCS C10 0.01F REF C12 1F CSIN BATT GND C4 22F SMART BATTERY PGND CSIP RS2 0.015 BATT + DLO N1 L1 10H MODE ACIN DCIN DHIV CSSN C17 0.1F
MAX1909
VCTL ICTL
PDL LDO C13 1F
P2
R13 33 C16 1F P1
DLOV
DHI
AVDD/REF
SCL SDA GND PGND GND
SCL SDA TEMP BATT -
Figure 2. Smart-Battery Charger Circuit Demonstrating Operation with a Host Microcontroller
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Multichemistry Battery Charger with Automatic System Power Selector MAX1909
DCIN PKPRES PACK_ON RDY 0.9 * LDO 5.4V LINEAR REGULATOR ICTLOK 0.8V GND CHG LOGIC 4.2235V REFERENCE REF LDO
ACIN ACOK
BATT SRDY DCIN GND CHG
2.048V
DRIVER
SRC PDS
CCS
SRC-10V DRIVER
PDL MODE
CLS
100k
CSSP CSSN CSIP CSIN GMS LEVEL SHIFTER SWITCH LOGIC
LEVEL SHIFTER
Gm SRC GMI
IINP
DRIVER
DHI DHIV LVC
ICTL CCI BATT BATT_UV
3.1V/CELL MODE
CELL SELECT LOGIC AND BATTERY VOLTAGEDIVIDER
GMV
DC-TO-DC CONVERTER
CCV REF R 9R VCTL R
DLOV
DRIVER
DLO
MAX1909
PGND
Figure 3. Functional Diagram ______________________________________________________________________________________ 15
Multichemistry Battery Charger with Automatic System Power Selector MAX1909
Detailed Description
The MAX1909 includes all of the functions necessary to charge Li+, NiMH, and NiCd batteries. A high-efficiency synchronous-rectified step-down DC-to-DC converter is used to implement a precision constant-current, constant-voltage charger with input current limiting. The DC-to-DC converter uses external P-channel/N-channel MOSFETs as the buck switch and synchronous rectifier to convert the input voltage to the required charge current and voltage. The charge current and input currentlimit sense amplifiers have low-input-referred offset errors and can use small-value sense resistors. The MAX1909 features a voltage-regulation loop (CCV) and two current-regulation loops (CCI and CCS). The CCV voltage-regulation loop monitors BATT to ensure that its voltage never exceeds the voltage set by VCTL. The CCI battery current-regulation loop monitors current delivered to BATT to ensure that it never exceeds the current limit set by ICTL. A third loop (CCS) takes control and reduces the charge current when the sum of the system load and the input-referred charge current exceeds the power source current limit set by CLS. Tying CLS to the reference voltage provides a 7.5A input current limit with a 10m sense resistor. The ICTL, VCTL, and CLS analog inputs set the charge current, charge voltage, and input current limit, respectively. For standard applications, internal set points for ICTL and VCTL provide a 3A charge current using a 15m sense resistor and a 4.2V per-cell charge voltage. The variable for controlling the number of cells is set with the MODE input. The PKPRES input is used for battery-pack detection, and provides shutdown control from a logic signal or external thermistor. Based on the presence or absence of the AC adapter, the MAX1909 automatically provides an open-drain logic output signal ACOK and selects the appropriate source for supplying power to the system. A P-channel load switch controlled from the PDL output and a similar Pchannel source switch controlled from the PDS output are used to implement this function. Using the MODE control input, the MAX1909 can be programmed to perform a relearning, or conditioning, cycle in which the battery is isolated from the charger and completely discharged through the system load. When the battery reaches 100% depth of discharge, it is recharged to full capacity. The circuit shown in Figure 1 demonstrates a simple hardwired application, while Figure 2 shows a typical application for smart-battery systems with variable charge current and source switch configuration that supports battery conditioning. Smart-battery systems typically use a host C to achieve this added functionality.
Setting the Charge Voltage
The MAX1909 uses a high-accuracy voltage regulator for charge voltage. The VCTL input adjusts the battery output voltage. In default mode (VCTL = LDO), the overall accuracy of the charge voltage is 0.5%. VCTL is allowed to vary from 0 to 3.6V, which provides a 10% adjustment range of the battery voltage. Limiting the adjustment range reduces the sensitivity of the charge voltage to external resistor tolerances from 2% to 0.2%. The overall accuracy of the charge voltage is better than 1% when using 1% resistors to divide down the reference to establish VCTL. The per-cell battery termination voltage is a function of the battery chemistry and construction. Consult the battery manufacturer to determine this voltage. The battery voltage is calculated by the equation: - 1.8V V VBATT = CELL VREF + VCTL 9.52 where VREF = 4.2235V, and CELL is the number of cells selected with the MAX1909's trilevel MODE control input. When MODE is tied to the LDO output, CELL = 4. When MODE is left floating, CELL = 3. When MODE is tied to ground, the charger enters conditioning mode, which is used to isolate the battery from the charger and discharge it through the system load. See the Conditioning Mode section. The internal error amplifier (GMV) maintains voltage regulation (See Figure 3 for Functional Diagram). The voltage-error amplifier is compensated at CCV. The component values shown in Figures 1 and 2 provide suitable performance for most applications. Individual compensation of the voltage regulation and current-regulation loops allow for optimal compensation. See the Compensation section.
Setting the Charge Current
The voltage on the ICTL input sets the maximum voltage across current-sense resistor RS2, which in turn determines the charge current. The full-scale differential voltage between CSIP and CSIN is 75mV; thus, for a 0.015 sense resistor, the maximum charge current is 5A. In default mode (ICTL = LDO), the sense voltage is 45mV with an overall accuracy of 5%. The charge current is programmed with ICTL using the equation: ICHG = 0.075 VICTL x RS2 3.6V
The input range for ICTL is 0.9V to 3.6V. The charger shuts down if ICTL is forced below 0.8V (typ). When choosing current-sense resistor RS2, note that it must have a sufficient power rating to handle the full-load
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Multichemistry Battery Charger with Automatic System Power Selector
current. The sense resistor's I2R power loss reduces charger efficiency. Adjusting ICTL to drop the voltage across the current-sense resistor improves efficiency, but may degrade accuracy due to the current-sense amplifier's input offset error. The charge-current error amplifier (GMI) is compensated at the CCI pin. See the Compensation section.
Current Measurement
The MAX1909 includes an input current monitor IINP. The current delivered at the IINP output is a scaleddown replica of the system load current plus the inputreferred charge current that is sensed across CSSP and CSSN inputs. The output voltage range is 0 to 3V. The voltage of IINP is proportional to the output current according to the following equation: VIINP = ISOURCE RS1 GIINP R9 where ISOURCE is the DC current supplied by the AC adapter power, GIINP is the transconductance of IINP (3mA/V typ), and R9 is the resistor connected between IINP and ground. Leave the IINP pin unconnected if not used.
MAX1909
Setting the Input Current Limit
The total input current, from a wall cube or other DC source, is the sum of the system supply current and the current required by the charger. The MAX1909 reduces the source current by decreasing the charge current when the input current exceeds the set input current limit. This technique does not truly limit the input current. As the system supply current rises, the available charge current drops proportionally to zero. Thereafter, the total input current can increase without limit. An internal amplifier compares the differential voltage between CSSP and CSSN to a scaled voltage set with the CLS input. VCLS can be driven directly or set with a resistive voltage-divider between REF and GND. Connect CLS to REF to set the input current-limit sense voltage to the maximum value of 75mV. Calculate the input current as follows: IIN = 0.075 VCLS x RS1 VREF
LDO Regulator
LDO provides a 5.4V supply derived from DCIN and can deliver up to 10mA of extra load current. The lowside MOSFET driver is powered by DLOV, which must be connected to LDO as shown in Figure 1. LDO also supplies the 4.2235V reference (REF) and most of the control circuitry. Bypass LDO with a 1F capacitor.
Shutdown and Charge Inhibit (PKPRES)
When the AC adapter is removed, the MAX1909 shuts down to a low-power state that does not significantly load the battery. Under these conditions, a maximum of 6A is drawn from the battery through the combined load of the SRC, CSSP, CSSN, CSIP, CSIN, and BATT inputs. The charger enters this low-power state when DCIN falls below the undervoltage lockout (UVLO) threshold of 7V. The PDS switch turns off, the PDL switch turns on, and the system runs from the battery. The body diode of the PDL switch prevents the voltage on the power source output from collapsing. Charging can also be inhibited by driving the pack detection input (PKPRES) high, which suspends switching and pulls CCI, CCS, and CCV to ground. The PDS and PDL drivers, LDO, input current monitor, and control logic (ACOK) all remain active in this state. Approximately 3mA of supply current is drawn from the AC adapter and 3A (max) is drawn from the battery to support these functions. The threshold voltage of PKPRES is 90% of VLDO (typ), with hysteresis of 1% VLDO to prevent erratic transitions. In smart-battery systems, PKPRES is usually driven from a voltage-divider formed with a low-value resistor or PTC thermistor inside the battery back and a local resistive pullup. This arrangement automatically detects the presence of a battery. A PTC thermistor can be used to shut down the MAX1909 when the battery pack is hot (see the Thermal Charge Qualification section).
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V CLS determines the reference voltage of the GMS error amplifier. Sense resistor RS1 sets the maximum allowable source current. Once the input current limit is reached, the charge current is decreased linearly until the input current is below the desired threshold. Duty cycle affects the accuracy of the input current limit. AC load current also affects accuracy (see Typical Operating Characteristics). Refer to the MAX1909 EV kit data sheet for more details on reducing the effects of switching noise. When choosing the current-sense resistor RS1, carefully calculate its power rating. Take into account variations in the system's load current and the overall accuracy of the sense amplifier. Note that the voltage drop across RS1 contributes additional power loss, which reduces efficiency. System currents normally fluctuate as portions of the system are powered up or put to sleep. Without input current regulation, the input source must be able to deliver the maximum system current and the maximum charger input current. By using the input current-limit circuit, the output current capability of the AC wall adapter can be lowered, reducing system cost.
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Multichemistry Battery Charger with Automatic System Power Selector MAX1909
A third method for inhibiting charging is to force ICTL below 0.8V (typ). Approximately 3mA of supply current is drawn from the AC adapter and 3A is drawn from the battery when the MAX1909 is in this state. body diode. See Figure 2. The SRC pin must be connected to the common source node of the back-to-back FETs to properly drive the MOSFETs. It is essential to alert the user that the system is performing a conditioning cycle. If the user terminates the cycle prematurely, the battery can be discharged even though the system was running off AC adapter for a substantial period of time. If the AC adapter is in fact removed during conditioning, the MAX1909 keeps the PDL switch on and the charger remains off as it would in normal operation. If the battery is removed during conditioning mode, the PKPRES control overrides conditioning mode. When MODE is grounded and PKPRES goes high, the PDS switch starts turning on within 7.5s and the system is powered from the AC adapter.
AC Adapter Detection and Power-Source Selection
The MAX1909 includes a hysteretic comparator that detects the presence of an AC power adapter and automatically delivers power to the system load from the appropriate available power source. When the adapter is present, the open-drain ACOK output becomes a high impedance. The switch threshold at ACIN is 2.048V. Use a resistive voltage-divider from the adapter's output to the ACIN pin to set the appropriate detection threshold. When charging, the battery is isolated from the system load with the P-channel PDL switch, which is biased off. When the adapter is absent, the drives to the switches change state in a fast breakbefore-make sequence. PDL begins to turn on 7.5s after PDS begins to turn off. The threshold for selecting between the PDL and PDS switches is set based on the voltage difference between the DCIN and the BATT pins. If this voltage difference drops below 100mV, the PDS is switched off and PDL is switched on. Under these conditions, the MAX1909 is completely powered down. The PDL switch is kept on with a 100k pulldown resistor when the charger is powered down through ICTL, PKPRES, or the AC adapter is removed. The drivers for PDL and PDS are fully integrated. The positive bias inputs for the drivers connect to the SRC pin and the negative bias inputs connect to a negative regulator referenced to SRC. With this arrangement, the drivers can swing from SRC to approximately 10V below SRC.
DC-to-DC Converter
The MAX1909 employs a buck regulator with a PMOS high-side switch and a low-side NMOS synchronous rectifier. The MAX1909 features a pseudo-fixed-frequency, cycle-by-cycle current-mode control scheme. The off-time is dependent upon VDCIN, VBATT, and a time constant, with a minimum t OFF of 300ns. The MAX1909 can also operate in discontinuous conduction for improved light-load efficiency. The operation of the DC-to-DC controller is determined by the following four comparators as shown in Figure 4: * CCMP: Compares the control point (lowest voltage clamp (LVC)) against the charge current (CSI). The high-side MOSFET on-time is terminated if the CCMP output is high. * IMIN: Compares the control point (LVC) against 0.15V (typ). If IMIN output is low, then a new cycle cannot begin. This comparator determines whether the regulator operates in discontinuous mode. * IMAX: Compares the charge current (CSI) to the internally fixed cycle-by-cycle current limit. The current-sense voltage limit is 97mV. With RS2 = 0.015,this corresponds to 6A. The high-side MOSFET on-time is terminated if the IMAX output is high and a new cycle cannot begin until IMAX goes low. IMAX protects against sudden overcurrent faults. * ZCMP: Compares the charge current (CSI) to 333mA (RS2 = 0.015). The current-sense voltage threshold is 5mV. If ZCMP output is high, then both MOSFETs are turned off. The ZCMP comparator terminates the switch on-time in discontinuous mode.
Conditioning Mode
The MAX1909 can be programmed to perform a conditioning cycle to calibrate the battery's fuel gauge. This cycle consists of isolating the battery from the charger and discharging it through the system load. When the battery reaches 100% depth of discharge, it is then recharged. Driving the MODE pin low places the MAX1909 in conditioning mode, which stops the charger from switching, turns the PDS switch off, and turns the PDL switch on. To utilize the conditioning mode function, the configuration of the PDS switch must be changed to two sourceconnected FETs to prevent the AC adapter from supplying current to the system through the MOSFET's
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Multichemistry Battery Charger with Automatic System Power Selector MAX1909
AC ADAPTER
CSSP
CSSN DHI CSS 20X DHI
MAX1909
IMAX 1.94V R COMP S Q DLO DLO Q
IMIN 0.15V TOFF
ZCMP 0.1V
LVC
CLS GMS
ICTL CSIP LVC GMI CSI 20X VCTL GMV CCV CCI CCS CSIN
BATT COUT
RCCV CCV CCI CCS
Figure 4. DC-to-DC Converter Functional Diagram ______________________________________________________________________________________ 19
Multichemistry Battery Charger with Automatic System Power Selector MAX1909
CCV, CCI, CCS, and LVC Control Blocks
The MAX1909 controls charge voltage (CCV control loop), charge current (CCI control loop), or input current (CCS control loop), depending on the operating conditions. The three control loops, CCV, CCI, and CCS, are brought together internally at the LVC amplifier. The output of the LVC amplifier is the feedback control signal for the DC-to-DC controller. The minimum voltage at CCV, CCI, or CCS appears at the output of the LVC amplifier and clamps the other two control loops to within 0.3V above the control point. Clamping the other two control loops close to the lowest control loop ensures fast transition with minimal overshoot when switching between different control loops (see the Compensation section). At the end of the fixed off-time, the controller can initiate a new cycle if the control point (LVC) is greater than 0.15V (IMIN = high) and the peak charge current is less than the cycle-by-cycle limit (IMAX = low). If the charge current exceeds IMAX, the on-time is terminated by the IMAX comparator. If during the off-time the inductor current goes to zero, ZCMP = high, both the high- and low-side MOSFETs are turned off until another cycle is ready to begin. This condition is discontinuous conduction. See the Discontinuous Conduction section. There is a minimum 0.3ms off-time when the (VDCIN VBATT) differential becomes too small. If VBATT 0.88 x V DCIN , then the threshold for minimum off-time is reached and the tOFF is fixed at 0.3ms. The switching frequency in this mode varies according to the equation: 1 f= L x IRIPPLE + 0.3s (VCSSN - VBATT )
Continuous Conduction Mode
With sufficient battery current loading, the MAX1909's inductor current never reaches zero, which is defined as continuous conduction mode. If the BATT voltage is within the following range: 3.1V (number of cells) < VBATT < (0.88 VDCIN) The regulator is not in dropout and switches at fNOM = 400kHz. The controller starts a new cycle by turning on the high-side P-channel MOSFET and turning off the low-side N-channel MOSFET. When the charge current is greater than the control point (LVC), CCMP goes high and the off-time is started. The off-time turns off the high-side P-channel MOSFET and turns on the low-side N-channel MOSFET. The operating frequency is governed by the off-time and is dependent upon VDCIN and VBATT. The off-time is set by the following equation: t OFF = where fNOM = 400kHz: L x IRIPPLE t ON = VCSSN - VBATT V xt where IRIPPLE = BATT OFF L f= 1 t ON + t OFF 1 VCSSN - VBATT fNOM VCSSN
Discontinuous Conduction
The MAX1909 enters discontinuous conduction mode when the output of the LVC control point falls below 0.15V. For RS2 = 0.015, this corresponds to 0.5A: 0.15V IMIN = = 0.5A 20 x RS2 where RS2 = 0.015. In discontinuous mode, a new cycle is not started until the LVC voltage rises above 0.15V. Discontinuous mode operation can occur during conditioning charge of overdischarged battery packs, when the charge current has been reduced sufficiently by the CCS control loop, or when the charger is in constant voltage mode with a nearly full battery pack.
Compensation
The charge voltage, charge current, and input currentlimit regulation loops are compensated separately and independently at the CCV, CCI, and CCS pins. CCV Loop Compensation The simplified schematic in Figure 5 is sufficient to describe the operation of the MAX1909 when the voltage loop (CCV) is in control. The required compensation network is a pole-zero pair formed with CCV and RCV. The pole is necessary to roll off the voltage loop's response at low frequency. The zero is necessary to compensate the pole formed by the output capacitor and the load. RESR is the equivalent series resistance (ESR) of the charger output capacitor (COUT). RL is the equivalent charger output load, where RL = VBATT / ICHG.
These equations describe the controller's pseudo-fixedfrequency performance over the most common operating conditions.
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Multichemistry Battery Charger with Automatic System Power Selector
The equivalent output impedance of the GMV amplifier, R OGMV , is greater than 10M. The voltage loop transconductance (GMV = ICCV/VBATT) depends on the MODE input, which determines the number of cells. GMV = 0.125mA/mV for 4 cells and GMV = 0.167mA/mV for 3 cells. The DC-to-DC converter transconductance is dependent upon the charge current-sense resistor RS2: 1 GMOUT = A CSI x RS2 where ACSI = 20, and RS2 = 0.015 in the Typical Application Circuits, so GMOUT = 3.33A/V. The loop transfer function is: LTF = GMOUT x RL ROGMV x (1+ sCCV x RCV )
CCV GMV RCV CCV ROGMV REF
MAX1909
BATT GMOUT RESR COUT RL
(1+ sCOUT x RL )
(1+ sCCV x ROGMV ) GMV (1+ sCOUT x RESR )
x
Figure 5. CCV Loop Diagram
ROGMV x (1+ sCCV x RCV )
(1+ sCCV x ROGMV )
RCV
The poles and zeros of the voltage-loop transfer function are listed from lowest frequency to highest frequency in Table 1. Near crossover, C CV has a much lower impedance than ROGMV. Since CCV is in parallel with ROGMV, CCV dominates the parallel impedance near crossover. Additionally, RCV has a much higher impedance than CCV and dominates the series combination of RCV and CCV, so:
COUT also has a much lower impedance than RL near crossover, so the parallel impedance is mostly capacitive and: 1 RL 1+ sCOUT x RL ) sCOUT ( If RESR is small enough, its associated output zero has a negligible effect near crossover and the loop-transfer function can be simplified as follows:
Table 1. Poles and Zeros of the Voltage-Loop Transfer Function
NO. NAME CALCULATION DESCRIPTION Lowest frequency pole created by CCV and GMV's finite output resistance. Since ROGMV is very large and not well controlled, the exact value for the pole frequency is also not well controlled (ROGMV > 10M). Voltage-loop compensation zero. If this zero is at the same frequency or lower than the output pole fP_OUT, then the loop transfer function approximates a single pole response near the crossover frequency. Choose CCV to place this zero at least one decade below crossover to ensure adequate phase margin. Output pole formed with the effective load resistance RL and the output capacitance COUT. RL influences the DC gain but does not affect the stability of the system or the crossover frequency. Output ESR Zero. This zero can keep the loop from crossing unity gain if fZ_OUT is less than the desired crossover frequency; therefore, choose a capacitor with an ESR zero greater than the crossover frequency.
1
CCV pole
fP _ CV =
1 2ROGMV x CCV
2
CCV zero
1 fZ _ CV = 2RCV x CCV 1 2RL x COUT
3
Output pole
fP _ OUT =
4
Output zero
1 fZ _ OUT = 2RESR x COUT
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Multichemistry Battery Charger with Automatic System Power Selector MAX1909
RCV LTF = GMOUT x GMV sCOUT Setting the LTF = 1 to solve for the unity gain frequency yields: fCO _ CV = GMOUT x GMV
RCV 2 x COUT
where CCV 4nF (assuming 4 cells and 4A maximum charge current). Figure 6 shows the Bode plot of the voltage-loop frequency response using the values calculated above. CCI Loop Compensation The simplified schematic in Figure 7 is sufficient to describe the operation of the MAX1909 when the battery current loop (CCI) is in control. Since the output capacitor's impedance has little effect on the response of the current loop, only a single pole is required to compensate this loop. ACSI is the internal gain of the current-sense amplifier. RS2 is the charge currentsense resistor, RS2 = 15m. ROGMI is the equivalent output impedance of the GMI amplifier, which is greater than 10M. GMI is the charge current amplifier transconductance = 1A/mV. GMOUT is the DC-to-DC converter transconductance = 3.3A/V. The loop transfer function is given by: LTF = GMOUT x A CSI x RS2 x GMI ROGMI 1+ sROGMI x CCI
For stability, choose a crossover frequency lower than 1/10th of the switching frequency. Choosing a crossover frequency of 30kHz and solving for R CV using the component values listed in Figure 1 yields: MODE = VCC (4 cells) GMV = 0.125A/mV COUT = 22F VBATT = 16.8V RL = 0.2 GMOUT = 3.33A/V fCO_CV = 30kHz fOSC = 400kHz RCV = 2 x COUT x fCO _ CV = 10k GMV x GMOUT
This describes a single pole system. Since: 1 GMOUT = A CSI x RS2 the loop transfer function simplifies to: LTF = GMI ROGMI 1+ sROGMI x CCI
To ensure that the compensation zero adequately cancels the output pole, select fZ_CV fP_OUT: CCV (RL/RCV) COUT
80 60 40 20 0 -20 -40 0.1 1 10 100 1k 10k 100k FREQUENCY (Hz) MAG PHASE
0 CSIP GMOUT RS2 -45 PHASE (DEGREES) CSIN
MAGNITUDE (dB)
CSI
-90
CCI GMI -135 1M CCI ROGMI ICTL
Figure 6. CCV Loop Response 22
Figure 7. CCI Loop Diagram
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Multichemistry Battery Charger with Automatic System Power Selector
The crossover frequency is given by: GMI fCO _ CI = 2CCI For stability, choose a crossover frequency lower than 1/10th of the switching frequency: CCI = GMI / (2 fO_CI) Choosing a crossover frequency of 30kHz and using the component values listed in Figure 1 yields CCI > 5.4nF. Values for CCI greater than 10 times the minimum value may slow down the current-loop response excessively. Figure 8 shows the Bode plot of the current-loop frequency response using the values calculated above. CCS Loop Compensation The simplified schematic in Figure 9 is sufficient to describe the operation of the MAX1909 when the input current-limit loop (CCS) is in control. Since the output capacitor's impedance has little effect on the response of the input current-limit loop, only a single pole is required to compensate this loop. ACSS is the internal gain of the current-sense amplifier. RS1 is the input current-sense resistor; RS1 = 10m in the Typical Applications Circuits. ROGMS is the equivalent output impedance of the GMS amplifier, which is greater than 10M. GMS is the charge-current amplifier transconductance = 1A/mV. GMIN is the DC-to-DC converter's input-referred transconductance = (1/D) GM OUT = (1/D) 3.3A/V.
CLS CSS ADAPTER INPUT CSSP RS1 CSSN GMS
MAX1909
CCS CCS ROGMS
GMIN SYSTEM LOAD
Figure 9. CCS Loop Diagram
The loop transfer function is given by: LTF = GMIN x A CSS x RS1x GMS Since: GMIN = 1 A CSS x RS1 ROGMS 1+ sROGMS x CCS
the loop transfer function simplifies to: LTF = GMS ROGMS 1+ sROGMS x CCS
The crossover frequency is given by:
100 80 MAGNITUDE (dB) 60 40 -45 20 0 -20 -40 0.1 10 1k FREQUENCY (Hz) 100k -90 10M MAG PHASE PHASE (DEGREES) 0
fCO _ CS =
GMS 2CCS
For stability, choose a crossover frequency lower than 1/10th the switching frequency: CCS = GMS / (2 fCO_CS) Choosing a crossover frequency of 30kHz and using the component values listed in Figure 1 yields CCS > 5.4nF. Values for CCI greater than 10 times the minimum value may slow down the current-loop response excessively. Figure 10 shows the Bode plot of the input current-limit loop frequency response using the values calculated above.
MOSFET Drivers
The DHI and DLO outputs are optimized for driving moderately sized power MOSFETs. The MOSFET drive
23
Figure 8. CCI Loop Response
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Multichemistry Battery Charger with Automatic System Power Selector
100 80 MAGNITUDE (dB) 60 40 -45 20 0 -20 -40 0.1 10 1k FREQUENCY (Hz) 100k -90 10M MAG PHASE PHASE (DEGREES) 0
from the gate of the P-channel FET. The internal pulldown transistors that drive DHI high are robust, with a 2.0 (typ) on-resistance. The low-side driver (DLO) swings from DLOV to ground and typically sources 0.5A and sinks 0.9A from the gate of the N-channel FET. The internal pulldown transistors that drive DLO low are robust, with a 1.0 (typ) onresistance. This helps prevent DLO from being pulled up when the high-side switch turns on, due to capacitive coupling from the drain to the gate of the low-side MOSFET. This places some restrictions on the FETs that can be used. Using a low-side FET with smaller gate-to-drain capacitance can prevent these problems.
MAX1909
Table 2. Recommended Components
REFERENCE QTY DESCRIPTION 22F 20%, 35V E-size low-ESR tantalum capacitors AVX TPSE226M035R0300 Kemet T495X226M035AS 1F 10%, 25V, X7R ceramic capacitors (1206) Murata GRM31MR71E105K Taiyo Yuden TMK316BJ105KL TDK C3216X7R1E105K 0.01F 10%, 25V, X7R ceramic capacitors (0402) Murata GRP155R71E103K TDK C1005X7R1E103K 0.1F 10%, 25V, X7R ceramic capacitors (0603) Murata GRM188R71E104K TDK C1608X7R1E104K 1F 10%, 6.3V, X5R ceramic capacitors (0603) Murata GRM188R60J105K Taiyo Yuden JMK107BJ105KA TDK C1608X5R1A105K Schottky diode, 0.5A, 30V SOD-123 Diodes Inc. B0530W General Semiconductor MBR0530 ON Semiconductor MBR0530 25V 1% zener diode CMDZ5253B 10H, 4.4A inductor Sumida CDRH104R-100NC TOKO 919AS-100M
Figure 10. CCS Loop Response
capability is the same for both the low-side and highside switches. This is consistent with the variable duty factor that occurs in the notebook computer environment where the battery voltage changes over a wide range. An adaptive dead-time circuit monitors the DLO output and prevents the high-side FET from turning on until DLO is fully off. There must be a low-resistance, low-inductance path from the DLO driver to the MOSFET gate for the adaptive dead-time circuit to work properly. Otherwise, the sense circuitry in the MAX1909 interprets the MOSFET gate as "off" while there is still charge left on the gate. Use very short, wide traces measuring 10 squares to 20 squares or less (1.25mm to 2.5mm wide if the MOSFET is 25mm from the device). Unlike the DLO output, the DHI output uses a fixeddelay 50ns time to prevent the low-side FET from turning on until DHI is fully off. The same layout considerations should be used for routing the DHI signal to the high-side FET. Since the transition time for a P-channel switch can be much longer than an N-channel switch, the dead time prior to the high-side PMOS turning on is more pronounced than in other synchronous step-down regulators, which use high-side N-channel switches. On the high-to-low transition, the voltage on the inductor's "switched" terminal flies below ground until the low-side switch turns on. A similar dead-time spike occurs on the opposite low-to-high transition. Depending upon the magnitude of the load current, these spikes usually have a minor impact on efficiency. The high-side driver (DHI) swings from SRC to 5V below SRC and typically sources 0.9A and sinks 0.5A
C1, C4
2
C5, C15
2
C9, C10
2
C11, C14, C17
3
C12, C13, C16
3
D4
1
D5
1
L1
1
24
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Multichemistry Battery Charger with Automatic System Power Selector
Table 2. Recommended Components (continued)
REFERENCE QTY DESCRIPTION Dual N- and P-channel MOSFETs, 7A, 30V and -5A, -30V, 8-pin SO, MOSFET Fairchild FDS8958A or Single N-channel MOSFETs, +13.5A, +30V FDS6670S and Single P-channel MOSFETs, -13.5A, -30V FDS66709Z Single, P-channel, -11A, -30V, 8-pin SO MOSFETs Fairchild FDS6675 100k, 5% resistor (0603) 10k 1% resistors (0603) 590k 1% resistor 0603 196k 1% resistor 0603 1M 5% resistor (0603) 1k 5% resistor (0603) 33 5% resistor (0603) 10k 5% resistors (0603) 0.01 1%, 0.5W sense resistor (2010) Vishay Dale WSL2010 0.010 1.0% IRC LRC-LR2010-01-R010-F 0.015 1%, 0.5W sense resistor (2010) Vishay Dale WSL2010 0.015 1.0% IRC LRC-LR2010-01-R015-F MAX1909ETI (28-pin thin QFN-EP)
N1/P1
1
P2, P3, P4 R4 R5, R9, R21 R6 R7 R8 R11 R16 R19, R20 RS1
3 1 2 1 1 1 1 1 2 1
(P1) must be able to dissipate the resistive losses plus the switching losses at both V DCIN(MIN) and VDCIN(MAX). Ideally, the losses at V DCIN(MIN) should be roughly equal to losses at V DCIN(MAX), with lower losses in between. If the losses at VDCIN(MIN) are significantly higher than the losses at VDCIN(MAX), consider increasing the size of P1. Conversely, if the losses at VDCIN(MAX) are significantly higher than the losses at VDCIN(MIN), consider reducing the size of P1. If DCIN does not vary over a wide range, the minimum power dissipation occurs where the resistive losses equal the switching losses. Choose a low-side MOSFET that has the lowest possible on-resistance (RDS(ON)), comes in a moderatesized package, and is reasonably priced. Make sure that the DLO gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic gate-to-drain capacitor caused by the high-side MOSFET turning on; otherwise, cross-conduction problems can occur. The MAX1909 has an adaptive dead-time circuit that prevents the high-side and low-side MOSFETs from conducting at the same time (see MOSFET Drivers). Even with this protection, it is still possible for delays internal to the MOSFET to prevent one MOSFET from turning off when the other is turned on. Select devices that have low turn-off times. To be conservative, make sure that P1(t DOFF (MAX)) N1(tDON(MIN)) < 40ns. Failure to do so may result in efficiency-killing shoot-through currents. If delay mismatch causes shoot-through currents, consider adding extra capacitance from gate to source on N1 to slow down its turn-on time.
MAX1909
RS2 U1
1 1
Design Procedure
Table 2 lists the recommended components and refers to the circuit of Figure 2. The following sections describe how to select these components.
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET, the worst-case power dissipation (PD) due to resistance occurs at the minimum supply voltage: V I 2 PD(P1) = BATT LOAD x RDS(ON) VDCIN 2 Generally, a small high-side MOSFET is desired to reduce switching losses at high input voltages. However, the RDS(ON) required to stay within package power-dissipation limits often limits how small the MOSFET can be. The optimum occurs when the switching (AC) losses equal the conduction (I 2 R DS(ON) ) losses. High-side switching losses do not usually become an issue until the input is greater than approxi25
MOSFET Selection
MOSFETs P2 and P3 (Figure 1) provide power to the system load when the AC adapter is inserted. These devices may have modest switching speeds, but must be able to deliver the maximum input current as set by RS1. As always, care should be taken not to exceed the device's maximum voltage ratings or the maximum operating temperature. The P-channel/N-channel MOSFETs (P1, N1) are the switching devices for the buck controller. The guidelines for these devices focus on the challenge of obtaining high load-current capability when using highvoltage (>20V) AC adapters. Low-current applications usually require less attention. The high-side MOSFET
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Multichemistry Battery Charger with Automatic System Power Selector
mately 15V. Switching losses in the high-side MOSFET can become an insidious heat problem when maximum AC adapter voltages are applied, due to the squared term in the CV2 f switching-loss equation. If the highside MOSFET that was chosen for adequate RDS(ON) at low supply voltages becomes extraordinarily hot when subjected to VDCIN(MAX), then choose a MOSFET with lower losses. Calculating the power dissipation in P1 due to switching losses is difficult since it must allow for difficult quantifying factors that influence the turn-on and turn-off times. These factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and PC board layout characteristics. The following switching-loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including a verification using a thermocouple mounted on P1: PD(P1_ Switching) = VDCIN(MAX)2 x CRSS x fSW x ILOAD 2 IGATE
MAX1909
1.5 3 CELLS 4 CELLS RIPPLE CURRENT (A) 1.0
0.5
VDCIN = 19V VCTL = ICTL = LDO 0 8 9 10 11 12 13 14 15 16 17 18 VBATT (V)
Figure 11. Ripple Current vs. Battery Voltage
where CRSS is the reverse transfer capacitance of P1, and IGATE is the peak gate-drive source/sink current. For the low-side MOSFET (N1), the worst-case power dissipation always occurs at maximum input voltage: V I 2 PD(N1) = 1- BATT LOAD x RDS(ON) VDCIN 2 Choose a Schottky diode (D1, Figure 2) having a forward voltage low enough to prevent the N1 MOSFET body diode from turning on during the dead time. As a general rule, a diode with a DC current rating equal to 1/3rd the load current is sufficient. This diode is optional and can be removed if efficiency is not critical.
tOFF = 0.3us for VBATT > 0.88 VDCIN Figure 11 illustrates the variation of the ripple current vs. battery voltage when the circuit is charging at 3A with a fixed input voltage of 19V. Higher inductor values decrease the ripple current. Smaller inductor values require high-saturation current capabilities and degrade efficiency. Designs that set LIR = IL/ICHG = 0.3 usually result in a good balance between inductor size and efficiency.
Input Capacitor Selection
The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents. Nontantalum chemistries (ceramic, aluminum, or OSCON) are preferred due to their resilience to power-up surge currents. V BATT (VDCIN - VBATT ) IRMS = ICHG VDCIN The input capacitors should be sized so that the temperature rise due to ripple current in continuous conduction does not exceed about 10C. The maximum ripple current occurs at 50% duty factor or VDCIN = 2 VBATT, which equates to 0.5 ICHG. If the application of interest does not achieve the maximum value, size the input capacitors according to the worst-case conditions.
Inductor Selection
The charge current, ripple, and operating frequency (off-time) determine the inductor characteristics. Inductor L1 must have a saturation current rating of at least the maximum charge current plus 1/2 of the ripple current (IL): ISAT = ICHG + (1/2) IL The ripple current is determined by: IL = VBATT tOFF / L where: tOFF = 2.5us (VDCIN - VBATT) / VDCIN for VBATT < 0.88 VDCIN or:
26
Output Capacitor Selection
The output capacitor absorbs the inductor ripple current and must tolerate the surge current delivered from the battery when it is initially plugged into the charger.
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Multichemistry Battery Charger with Automatic System Power Selector
As such, both capacitance and ESR are important parameters in specifying the output capacitor as a filter and to ensure the stability of the DC-to-DC converter. (See the Compensation section.) Beyond the stability requirements, it is often sufficient to make sure that the output capacitor's ESR is much lower than the battery's ESR. Either tantalum or ceramic capacitors can be used on the output. Ceramic devices are preferable because of their good voltage ratings and resilience to surge currents.
MAX1909
BATTERY MAX1909
LDO CLDO 1F TEMP THERMISTER R2 70k R1 10k
LDO
Applications Information
Startup Conditioning Charge for Overdischarged Cells
It is desirable to charge deeply discharged batteries at a low rate to improve cycle life. The MAX1909 automatically reduces the charge current when the voltage per cell is below 3.1V. The charge current-sense voltage is set to 4.5mV (ICHG = 300mA with RS2 = 15m) until the battery voltage rises above the threshold. There is approximately 300mV for 3 cell, 400mV for 4 cell of hysteresis to prevent the charge current magnitude from chattering between the two values.
PKPRES
Figure 12. Use of a PTC Thermistor for Thermal Change Qualification
Thermal Charge Qualification
Based on the cell characteristics, the MAX1909 should not charge batteries operating above a specified temperature. Often a PTC thermistor is included inside the battery pack to measure its temperature. When connected to the charger, the thermistor forms a voltagedivider with a resistive pullup to the LDO. The threshold voltage of PKPRES is 90% of VLDO (typ), with hysteresis of 1% of VLDO to prevent erratic transitions. The thermistor can be selected to have a resistance vs. temperature characteristic that abruptly increases above a critical temperature. This arrangement automatically shuts down the MAX1909 when the battery pack is above a critical temperature. For the example shown in Figure 12, a Thermometrics YSC060 device is selected with the thermal threshold of approximately +60C.
Refer to the PC board layout in the MAX1909 evaluation kit for examples. A ground plane is essential for optimum performance. In most applications, the circuit is located on a multilayer board, and full use of the four or more copper layers is recommended. Use the top layer for high-current connections, the bottom layer for quiet connections, and the inner layers for an uninterrupted ground plane. Use the following step-by-step guide: 1) Place the high-power connections first, with their grounds adjacent: a) Minimize the current-sense resistor trace lengths, and ensure accurate current sensing with Kelvin connections. b) Minimize ground trace lengths in the high-current paths. c) Minimize other trace lengths in the high-current paths. d) Use > 5mm wide traces. e) Connect C1 and C2 to the high-side MOSFET (10mm max length). Return these capacitors to the power ground plane. f) Minimize the LX node (MOSFETs, rectifier cathode, inductor (15mm max length)). Ideally, surface-mount power components are flush against one another with their ground terminals almost touching. These high-current grounds are then connected to each other with
Layout and Bypassing
Bypass DCIN with a 1F capacitor to ground (Figure 1). D4 protects the MAX1909 when the DC power source input is reversed. A signal diode for D4 is adequate because DCIN only powers the LDO and the internal reference. Bypass LDO, DHIV, DLOV, and other pins as shown in Figure 1. Good PC board layout is required to achieve specified noise, efficiency, and stable performance. The PC board layout artist must be given explicit instructions-- preferably, a sketch showing the placement of the power-switching components and high-current routing.
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27
Multichemistry Battery Charger with Automatic System Power Selector
a wide, filled zone of top-layer copper, so they do not go through vias. The resulting top-layer ground plane is connected to the normal inner-layer ground plane at the output ground terminals, which ensures that the IC's analog ground is sensing at the supply's output terminals without interference from IR drops and ground noise. Other high-current paths should also be minimized, but focusing primarily on short ground and current-sense connections eliminates about 90% of all PC board layout problems. 2) Place the IC and signal components. Keep the main switching node (LX node) away from sensitive analog components (current-sense traces and REF capacitor). Important: The IC should be less than 10mm from the current-sense resistors. Quiet connections to REF, VCTL, ICTL, CCV, CCI, CCS, IINP, ACIN, and DCIN should be returned to a separate ground (GND) island. The appropriate traces are marked on the schematic with the ground symbol ( ). There is very little current flowing in these traces, so the ground island need not be very large. When placed on an inner layer, a sizable ground island can help simplify the layout because the low-current connections can be made through vias. The ground pad on the backside of the package should also be connected to this quiet ground island. 3) Keep the gate drive traces (DHI and DLO) as short as possible (L < 20mm), and route them away from the current-sense lines and REF. These traces should also be relatively wide (W > 1.25mm). 4) Place ceramic bypass capacitors close to the IC. The bulk capacitors can be placed further away. 5) Use a single-point star ground placed directly below the part at the PGND pin. Connect the power ground (ground plane) and the quiet ground island at this location. See Figure 13.
Figure 13. PC Board Layout Examples
MAX1909
VIA CONNECTING POWER GROUND TO QUIET ANALOG GROUND
HIGH-CURRENT PGND PLANE
QUIET GROUND ISLAND
KELVIN-SENSE VIAS UNDER THE SENSE RESISTOR (REFER TO EVALUATION KIT) INDUCTOR
COUT
COUT CIN
OUTPUT
INPUT GND
Chip Information
TRANSISTOR COUNT: 2720 PROCESS: BiCMOS
28
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Multichemistry Battery Charger with Automatic System Power Selector
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX1909
0.15 C A
D2
C L
D
b D2/2
0.10 M C A B
PIN # 1 I.D.
D/2
0.15 C B
k
PIN # 1 I.D. 0.35x45
E/2 E2/2 E (NE-1) X e
C L
E2
k L
DETAIL A
e (ND-1) X e
C L
C L
L
L
e 0.10 C A 0.08 C
e
C
A1 A3
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE 16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL DOCUMENT CONTROL NO. REV.
21-0140
C
1 2
COMMON DIMENSIONS
EXPOSED PAD VARIATIONS
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220. 10. WARPAGE SHALL NOT EXCEED 0.10 mm.
PROPRIETARY INFORMATION TITLE:
PACKAGE OUTLINE 16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL DOCUMENT CONTROL NO. REV.
21-0140
C
2 2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 29 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
QFN THIN.EPS

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